1. Field of the Invention
The present invention relates to a data processor for fetching and sequentially executing an instruction code, and more particularly to a data processor having a function of modifying the content of the operation of an instruction which is executable alone.
2. Description of the Background Art
In recent years the performance of applications has been enhanced and the number of functions of applications has increased and, at the same time, the number of types of instructions required for a data processor, such as a microprocessor, has also increased. In general, selection of instructions is carried out taking the target application, cost and the like into consideration at the time the instruction set is determined when designing a data processor.
It is important to increase the code efficiency in order to, for example, lower product cost. In a data processor built into an equipment wherein a program is written into a ROM (Read Only Memory), the size of the program is a significant factor in determining product cost and, therefore, it is particularly important to increase code efficiency.
An increase in code efficiency is achieved by selecting instructions having a high frequency of execution and by implementing these instructions as instructions of smaller code sizes. When, in order to make the basic instruction length shorter, the number of instructions is too greatly reduced, however, the desired function or performance cannot be obtained. In addition, in some cases, on contrary, the number of instructions necessary for implementation of a predetermined process increases, which results in an increase in the code size.
On the other hand, in the case of the development of a specific data processor having a certain degree of versatility, it is necessary to implement instructions utilized in the target application in the data processor in order to efficiently process this application. In order to efficiently cope with multimedia processing, instructions including a product-sum operation instruction are, for example, added. There is a tradeoff between reduction in cost as a result of increase in code efficiency and the addition of instructions for the enhancement of performance.
In a data processor for carrying out a signal process, for example, a saturation operation is frequency used. In the case that an overflow generates when a saturation operation is carried out a maximum value is set as a result of the operation and in the case that an underflow generates when a saturation operation is carried out a minimum value is set as a result of the operation, thereby it becomes possible to prevent the result of the operation from being converted from the maximum value to the minimum value or from the minimum value to the maximum value.
However, there are many operation instructions that must be implemented as saturation operations, such as addition and subtraction, sign change, calculation of the absolute value, shift and the like. In addition, for each of these operations the operand may be given as the immediate data or the operand may be stored in a register, an accumulator or a memory and, therefore, many instructions must be provided according to the types of operands.
Thus, in the case that an instruction with a saturation operation function and an instruction without a saturation operation function are both provided, the number of instructions that are implemented increase and the bit width necessary for the instructions increases so that the code efficiency is decreased. In particular, in a versatile data processor, the size of an instruction is, at least, a byte (eight bit) unit. Furthermore, many data processors adopt an instruction set of 16/32/64 bit units in order to simplify hardware control, in order to increase the operational frequency and in order to achieve enhancement of performance. Accordingly, restrictions in respect to instruction allocation become great and it becomes difficult to allocate many instructions with instructions of a short length so that reduction of costs becomes difficult.
In order to solve such a problem, a data processor has been developed that is provided with a function of designating an operation mode and that can execute different operation contents depending on the operation mode even for the same instruction code. However, saturation operation is not, in general, carried out in an address calculation or the like. In the case that the same instructions are utilized for address calculation and for a data operation, and a saturation operation is required in the data operation, it becomes necessary to frequently carry out change of the mode setting. Accordingly, in such a case, the overhead required for change of the mode setting becomes great and the performance may significantly deteriorate.
In addition, the content of the operation is not determined by the instruction codes alone and, therefore, debugging of the program becomes difficult and the possibility of bugs becoming incorporated in the program becomes high. In the case that the same process is converted into subroutines, for example, different mode settings when calling out such subroutines lead to different operational contents of the subroutines due the status thereof and, thereby, a problem may arise causing a malfunction.
As described above, in the data processor according to a prior art, a great number of independent operation instructions are attempted to be implemented in order to increase performance, resulting in a long basic instruction length and, therefore, a problem arises wherein the code efficiency is decreased leading to higher product costs.
In addition, in the case that different operations are executed using the same instruction according to the mode setting, the debugging of a program becomes difficult causing a problem wherein the possibility of the incorporation of bugs in a program is increased and wherein the overhead accompanying change in the mode setting becomes great, so that processing performance is lowered.